1. Field of the Invention
The present invention relates to a multilayer wiring board which is suitable for the production of products of a number of types in respectively small amounts in a short term by the so-called build-to-order production in which the production is started after receiving an order, and a process for fabricating a multilayer wiring board.
2. Description of Related Art
An example of a fabrication process for a conventional, general multilayer printed wiring board is described with reference to FIG. 9.
A multilayer printed wiring board is fabricated as follows. Using a double-sided copper-clad laminate comprising a resin base material which is comprised of an epoxy resin containing, e.g., about 500-mm square glass cloth, and which has both surfaces laminated with a copper foil (S1), a pattern for inner layer of the wiring board is first formed by a so-called photolithography method (S1 to S7). The copper-clad laminate is covered with a dry film (photoresist)(S2), and, using a photomask having formed a pattern of the inner layer wiring, the resultant copper-clad laminate is subjected to exposure (S3), development (S4), etching (S5), removal of the dry film (S6), washing with water (S7), and drying (S8).
Then, a copper foil is stacked on each of the top and back surfaces of the patterned inner layer substrate through a thermosetting resin (prepreg) (S9), and heated under a pressure to bond them together (S10). A pattern of the outer layer is formed through steps (S11 to S17) in the same manner as in the formation of the inner layer pattern (S2 to S8). Subsequently, a via hole is formed in the patterned outer layer (step 18), and the inside of the via hole is cleaned, followed by copper plating for the via hole for achieving electrical connection between the inner wiring and the outer layer (step 19).
Next, for surely obtaining the reliability including a moisture resistance, the wiring board laminate is subjected to post-treatment. Specifically, a solder resist pattern is formed on each of the top and back surfaces of the wiring board laminate having formed the pattern of the outer layer wiring (step 20) to cover substantially the whole area, excluding connection terminal areas, such as lands and pads. Then, the number for the board, letters and characters, and the like are printed by silk screening (step 21). The resultant wiring board is processed into a predetermined external dimension, and, for the multiple dividable board, if necessary, a V-groove or the like is formed so that the board can be easily divided in the subsequent step (step 22). Subsequently, checking, such as an appearance test or a conduction test, is conducted (step 23), and the land and pad, which are exposed through the solder resist pattern, are subjected to surface treatment, e.g., plating or anticorrosion treatment (step 24), thus completing a multilayer printed wiring board.
With respect to the multilayer printed wiring board, for surface mount parts, such as IC parts and chip parts in the QFP (quad flat package), a solder paste is printed (step 25), and then parts are mounted (S26), and subjected to reflow heating and soldered at a predetermined position (step 27). Particularly, when the part to be mounted is sensitive to high-frequency waves or the like, a shielding case for electromagnetic shielding is fixed to a region containing the part and soldered to achieve electrical conduction between the case and the ground (step 28).
When the wiring pattern is comprised of four layers including the top and back surfaces, for example, one double-sided copper-clad laminate is used for the inner layer and two copper foils are used for the outer layers of the top and back surfaces, and treatments of exposure, development, etching, and removal of the resist are conducted using four photomasks for the respective layers. When the wiring pattern is comprised of six layers, for example, one double-sided copper-clad laminate is used for the inner layer and two laminates are used for the outer layer and patterns are formed using six photomasks for the respective layers.
As examples of the conventionally known printed wiring boards, there can be mentioned those disclosed in patent document 1 and patent document 2.
[Patent document 1] Japanese Patent Application Publication No. 2002-335077 (FIG. 3)
[Patent document 2] Japanese Patent Application Publication No. 2000-353863 (FIG. 4)